Dr. Dipjyoti Das is a native of Abhayapuri, popularly known as the “Devodaru Nagari,” situated in the Bongaigaon district of Assam. He completed his Bachelor of Engineering from Assam Engineering College and pursued his Ph.D. from IIT Guwahati. His doctoral research focused on solution-processed OLEDs for solid-state lighting.

Following his Ph.D., Dr. Dipjyoti Das worked as a postdoctoral researcher at KAIST, South Korea, where he began working on ferroelectric memories and energy storage capacitors. He later moved to Georgia Institute of Technology as a postdoctoral fellow, focusing on FeFETs and ferroelectric flash memory technologies. After his tenure at Georgia Tech, he joined NIT Silchar as an Assistant Professor, where he continued his research and academic activities in semiconductor devices and emerging memory technologies.

Dr. Dipjyoti Das has received several prestigious recognitions and awards, including the BK21PLUS Fellowship, the IEDM 2023 Highlight Paper recognition, and the Haedong Best Paper Award (Academic Category) in 2024. He also received the Certificate of Proficiency from the Assam Higher Secondary Education Council in 2007 and the Anundoram Borooah Award from the Government of Assam in 2005.

• Study and Engineering of Ferroelectric Properties in Undoped and Doped Hafnia Films for Emerging Non-Volatile Memory Applications, PMECRG 2026, ANRF

Selected Publications

1. “Pushing the limits of NAND technology scaling with ferroelectrics”, MRS Bulletin, 50(9), 1094-1107, 2025.
2. “Optimizing Memory Window for Ferroelectric Nand Applications: An Experimental Study on Dielectric Material Selection and Layer Positioning,” IEEE Transactions on Electron Devices, 72(1), 234-239, 2025.
3. “Disturb and its mitigation in ferroelectric field effect transistors with large memory window for NAND Flash applications” IEEE Electron Device Letters, 45(12), 2367-2370, 2024.
4. “Material choices for Tunnel Dielectric Layer and Gate Blocking Layer for Ferroelectric NAND Applications,” IEEE Electron Device Letters, 45(10), 1776-1779, 2024.
5. “A Ge-Channel Ferroelectric Field Effect Transistor with Logic-Compatible Write Voltage,” IEEE Electron Device Letters, 44(2), 257-260, 2023.
6. “Sub 5 Å-EOT Hf_xZr_1-xO₂ for Next Generation DRAM Capacitors using Morphotropic Phase Boundary and High Pressure (200 atm) Annealing with Rapid Cooling Process,” IEEE Transactions on Electron Devices, 69 (1), 103-108, 2022.
7. “Ferroelectricity in CMOS Compatible Hafnium Oxides and the Revival of Ferroelectric Field Effect Transistor Technology,” IEEE Nanotechnology Magazine, 2021, 15(5), 20-32, 2021.
8. “Influence of High-Pressure Annealing Conditions on Ferroelectric and Interfacial Properties of Zr Rich Hf_xZr_1-xO₂ Capacitors,” IEEE Transactions on Electron Devices, 68(4), 1996-2002, 2021.
9. “Insertion of Dielectric Interlayer: A New Approach to Enhance Energy Storage in Hf_xZr_1-xO₂ Capacitors,” IEEE Electron Device Letters, 42, 331-334, 2021.
10. “The Influence of Top and Bottom Metal Electrodes on Ferroelectricity of Hafnia,” IEEE Transactions on Electron Devices, 68(2), 523-528, 2021.
11. “Trade-off between Interfacial Charge and Negative Capacitance Effects in the Hf-Zr-Al-O/Hf_0.5Zr_0.5O₂ Bilayer System,” Solid State Electronics, 174, 107914, 2020.
12. “High-k Hf_xZr_1-xO₂ ferroelectric insulator by utilizing high pressure anneal,” IEEE Transactions on Electron Devices, 67(6), 2489-2494, 2020.
13. “Demonstration of high ferroelectricity (P_r~29μC/cm²) in Zr rich Hf_xZr_1-xO₂ films,” IEEE Electron Device Letters, 41(1), 34-37, 2020.
14. “Insertion of HfO₂ Seed/Dielectric Layer to the Ferroelectric HZO Films for Heightened Remanent Polarization in MFM Capacitors,” IEEE Transactions on Electron Devices, 67(2), 745-750, 2020.
15. “White light emitting diode based on purely organic fluorescent to modern thermally activated delayed fluorescence (TADF) and perovskite materials,” Nano Convergence, 6, 31, 2019.

Selected Publications

1. “Design Framework for Ferroelectric Gate Stack Engineering of Vertical NAND Structures for Efficient TLC and QLC Operation,” 2024 IEEE International Memory Workshop, 2024, pp. 1-4, doi: 10.1109/IMW59701.2024.10536982.
2. “Comprehensive time dependent dielectric breakdown (TDDB) characterization of ferroelectric capacitors under bipolar stress conditions,” IEEE – IRPS – International Reliability Physics Symposium (IRPS 2024), 2024, pp. 1-5, doi: 10.1109/IRPS48228.2024.10529414.
3. “Ferroelectric Gate Stack Engineering with Tunnel Dielectric Insert for Achieving High Memory Window in FEFETs for NAND Applications,” 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 2024, pp. 1-3, doi: 10.1109/EDTM58488.2024. 10511400.
4. “Experimental demonstration and modeling of a ferroelectric gate stack with a tunnel dielectric insert for NAND applications,” 2023 IEEE International Device Meeting (IEDM), 2023, pp. 1-4, doi: 10.1109/IEDM45741.2023.10413697. (Selected as a highlight paper).
5. “Effect of high-pressure annealing temperature on the ferroelectric properties of TiN / Hf_0.25Zr_0.75O₂ /TiN Capacitors,” 2020 IEEE EDTM, Conference Proceedings, 255-257, 2020.

Book Chapters

1. “Organic Semiconductors: A New Future of Nanodevices and Applications,” Thin Film Structures in Energy Applications, Springer, 97-128, 2015.

Patents (Applied)

1. FERROELECTRIC GATE STACK WITH TUNNEL DIELECTRIC INSERT FOR NAND APPLICATIONS, S. Provisional Application No. 63/606,684, Date: December 6, 2023, Applicants: SAMSUNG ELECTRONICS CO., LTD., GEORGIA TECH RESEARCH CORPORATION.
2. DISTURB MITIGATION SCHEME FOR FERROELECTRIC FIELD-EFFECT TRANSISTORS, S. Provisional Application No. 63/692,275, Date: September 7, 2024, Applicants: SAMSUNG ELECTRONICS CO., LTD., GEORGIA TECH RESEARCH CORPORATION

• Ph.D, Indian Institute of Technology Guwahati, Assam, India, 2018
• B.E, Assam Engineering College, Assam, India

• Assistant Professor Gr-I, Indian Institute of Technology Bhubaneswar, April 26- Present
• Assistant Professor Gr-II, National Institute of Technology Silchar, Dec 2023-April 2026
• Post Doctoral Fellow, Georgia Institute of Technology, USA, Feb 2022-Nov 2023
• Post Doctoral Researcher, Korea Advanced Institute of Science and Technology (KAIST), South Korea, Aug 2018-Aug 2020

• Haedong Best Paper Award (Academic Category) in 2024
• IEDM 2023 Highlight Paper Recognition,
• BK21PLUS Fellowship,
• Certificate of Proficiency from the Assam Higher Secondary Education Council in 2007
• Anundoram Borooah Award from the Government of Assam in 2005.