Dr. Devashree Tripathy
Assistant Professor
- Room No: A-207, SECS
- devashreetripathy@iitbbs.ac.in
- School of Electrical and Computer Sciences
- Research
- Biosketch
- Projects
- Teaching
- Mentoring
- Publication International
- Conference International
- Conference National
- Books & Patents
- Education
- Experience
- Awards
- Others
Dr. Devashree Tripathy is an Assistant Professor in Computer Science and Engineering at Indian Institute of Technology, Bhubaneswar. Her research spans in Computer Architecture , High Performance Computing, Fault-Tolerance systems, performance and power-efficient designs for accelerators, and Machine Learning. Her current research focuses on ML for Systems and Systems for ML. Prior to joining IIT Bhubaneswar, Dr. Tripathy was a Postdoctoral Fellow in Computer Science at Harvard University in Harvard Architecture, Circuits, and Compilers Group. She is currently working as an Associate with Harvard University. She graduated from University of California, Riverside with PhD in Computer Science.
At IIT Bhubaneswar:
IITBBS-PG-CS6L009 – High Performance Computer Architecture (Spring 2023)
IITBBS-UG-CS1P001 – Introduction to Programming and Data Structures Laboratory (Spring/Autumn 2023)
IITBBS-UG-CS3L002 – Computer Organization and Architecture Theory + Laboratory(Autumn 2023)
At Harvard University, USA:
Harvard-PG-CS249r – Tiny Machine Learning : Applied Machine Learning on Embedded IoT Devices (Fall 2022)
At University of California, USA:
UCR-UG-CS005 – Introduction To Computer Programming (Fall 2019)
UCR-PG-CS203 – Advanced Computer Architecture (Winter 2018, Winter 2019)
UCR-PG-CS213 – Multiprocessor Architecture and Programming (Spring 2018, Winter 2020)
At CSIR-CEERI Pilani, India:
CEERI-PG-2-219 – Advanced Signal and Image Processing (2014)
- Subhra Jyotshna Dash (January 2023 – Present)
- Renuka Acharya (July 2023 – Present)
- Tripathy, D., A. Abdolrashidi, L. Bhuyan, L. Zhou and D. Wong, “PAVER: Locality Graph-based Thread Block Scheduling for GPUs” ACM Transactions on Architecture and Code Optimization (ACM Transactions TACO, 2021), vol 18, issue 3, article 32, pp 1-26. * Invited to present at European Network on High Performance and Embedded Architecture and Compilation (HiPEAC, 2022) on June 20-22, Budapest, Hungary. https://doi.org/10.1145/3451164 Scopus Impact Factor: 2.11(2022), SCImago Journal Rank (SJR): 0.263, H-index: 41, SJR Quartile: Q3
- Boroujerdian, B., Y. Jing, D. Tripathy, A. Kumar, L. Subramanian, L. Yen, V. Lee, V. Venkatesan, A. Jindal, R. Shearer, V. J. Reddi, “FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip Complexity” (Accepted to appear in ACM Transactions TECS 2022- ACM Transactions on Embedded Computing Systems) Scopus Impact Factor: 2.215(2022), SCIE/SSCI Rank: 10339, SCImago Journal Rank (SJR): 0.435, H-index: 58 SCI Indexed
- Patel, D.K., D. Tripathy, & C. Tripathy, “An improved load-balancing mechanism based on deadline failure recovery on GridSim”. Engineering with Computers 32, 173-188 (Springer 2016). https://doi.org/10.1007/s00366-015-0409-y Impact Factor: 8.083 (2021), H-index: 60, SJR Quartile: Q1
- Patel, D.K., D. Tripathy and C. Tripathy, “Survey of load balancing techniques for Grid.” Journal of Network and Computer Applications, Vol 65, 103-119 (Elsevier 2016). https://doi.org/10.1016/j.jnca.2016.02.012 Scopus Impact Factor: 9.294 (2021), H-index: 115, SCImago Journal Rank (SJR): 2.193, SJR Quartile: Q4
- Tripathy, L., D. Tripathy and C. Tripathy, “Fault Tolerance in Interconnection Network-a Survey.” Research Journal of Applied Sciences, Engineering and Technology 2015, 198-214. H-index: 27, SJR Quartile: Q1 https://doi.org/10.19026/rjaset.11.1708 Impact Factor: 0.22(2016).
- ArchGym: Establishing Stronger Baselines for Machine-Learning Assisted Architecture Design. ISCA ’23 Srivatsan Krishnan, Amir Yazdanbakhsh, Jason Jabbour, Ikechukwu Uchendu, Susobhan Ghosh, Behzad Boroujerdian, Daniel Richins, Devashree Tripathy, Aleksandra Faust, and Vijay Janapa Reddi (with Harvard University, University of Texas at Austin, Google Research/ Brain Team and Facebook Research) International Symposium on Computer Architecture (ISCA), 2023, June 17 – 23, Orlando, Florida, USA. (acceptance rate: 21% , Core Ranking: A*)
- Tripathy, Devashree, Hadi Zamani, Debiprasanna Sahoo, Laxmi Narayan Bhuyan, and Manoranjan Satpathy “Slumber: Static-Power Management for GPGPU Register Files” ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED, 2020), August 10-12, Boston, Massachusetts, USA. (Virtual due to Covid-19). https://doi.org/10.1145/3370748.3406577
- Tripathy, Devashree, AmirAli Abdolrashidi, Quan Fan, Daniel Wong and and Manoranjan Satpathy, “LocalityGuru: A PTX Analyzer for Extracting Thread Block-level Locality in GPGPUs,” IEEE International Conference on Networking, Architecture and Storage (NAS, 2021), October 24-26, Riverside, California, USA. https://doi.org/10.1109/NAS51552.2021.9605411
- Abdolrashidi, AmirAli, Devashree Tripathy, Mehmet Esat Belviranli, Laxmi Narayan Bhuyan, and Daniel Wong. “Wireframe: Supporting data-dependent parallelism through dependency graph execution in gpus.” In Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2017), October 14-18, Boston, Massachusetts, USA.
- Zamani, Hadi, Devashree Tripathy, Ali Jahanshahi and Daniel Wong, “ICAP: Designing Inrush Current Aware Power Gating Switch for GPGPU,” IEEE International Conference on Networking, Architecture and Storage (NAS, 2021), October 24-26, Riverside, California, USA. https://doi.org/10.1109/NAS51552.2021.9605434
- Zamani, Hadi, Devashree Tripathy, Laxmi Bhuyan, and Zizhong Chen. “SAOU: Safe Adaptive Overclocking and Undervolting for Energy-Efficient GPU Computing” ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED, 2020), August 10-12, Boston, Massachusetts, USA. (Virtual due to Covid-19). https://doi.org/10.1145/3370748.3406553
- Zamani, Hadi, Yuanlai Liu, Devashree Tripathy, Laxmi Bhuyan, and Zizhong Chen. “GreenMM: energy efficient GPU matrix multiplication through undervolting.” ACM International Conference on Supercomputing (ICS 2019), June 26-28, Phoenix, Arizona, USA. https://doi.org/10.1145/3330345.3330373
Degree | Discipline | Year | School |
---|---|---|---|
Postdoc | Computer Science | 2022 | HARVARD UNIVERSITY | Cambridge, MA, USA |
PhD | Computer Science (Dean’s Distinguished Fellowship) | 2021 | UNIVERSITY OF CALIFORNIA, RIVERSIDE (UCR) | Riverside, CA, USA |
M.Tech | Advanced Electronics Systems (Quick Hire Fellowship, CSIR) | 2014 | CSIR – CENTRAL ELECTRONICS ENGINEERING RESEARCH INSTITUTE (CSIR-CEERI) | Pilani, India | |
B.Tech | Electronics and Telecommunications Engineering (University Topper) | 2012 | VEER SURENDRA SAI UNIVERSITY OF TECHNOLOGY (VSSUT, FORMERLY UCE) | BURLA, India |
Associate – Harvard University | Cambridge, MA, USA | 2022- current ;
Postdoctoral Fellow in Computer Science – Harvard University | Cambridge, MA, USA | 2021- 2022;
GPU Modelling Intern – Samsung Austin R&D Center, USA | 06/2018 – 09/2018 • Award of Excellence
- Postdoctoral Fellowship Offers from Penn State University, North Carolina State University (NCSU), University of South Carolina and Harvard University. Accepted the Harvard University Offer (2021).
- Anita Borg Grace Hopper Scholarship
- Student Travel Grant for ACM/IEEE ISCA 2019 ($600 from NSF), ACM HPDC 2019 ($1739), ACM/IEEE MICRO 2017 ($474 from ACM/IEEE), CWWMCA 2017 ($970), NAS 2016 ($566), NAS 2021 ($868).
- Student Volunteer Award ISCA 2018 ($572).
- Invited by Computing Research Association (CRA), USA to attend Grad Cohort for Women 2018 April 13-14, 2018 at San Francisco, CA, USA.
- Award of Excellence as GPU Modelling Intern at Samsung Austin R&D Center, USA, September, 2018
- Dean’s Distinguished Fellowship, UCR 2015-2019 ($171,233)
- CSIR Quick-Hire Fellowship by Government of India (2012 -2014)
- 1st rank/University Topper among all disciplines in B.Tech. (undergraduate) students at VSSUT, Burla (2012) a. Awarded University Gold medal for University Topper, 2012 b. Awarded University Silver medal for best Electronics and Telecommunication Engg graduate at VSSUT Burla, 2012
- 1st rank among all girls in first year B.Tech at VSSUT, Burla (2008)
- Top 0.1% among all the students in India, Central Board of Secondary Education (2006)