Dr. Debiprasanna Sahoo
Assistant Professor
- Room No: B103, SECS
- dpsahoo@iitbbs.ac.in
- School of Electrical and Computer Sciences
1. Machine Learning for Computer System Design, 2. Computer Architecture for language model, federated learning, graphics as application,3. Formal Methods for Computer Architecture.
Students interested to work in the area of:
- Machine Learning for Computer System Design
- Computer Architecture for language model, federated learning, graphics as application
- Formal Methods for Computer Architecture.
may send me an email to me on dpsahoo@iitbbs.ac.in
Please send e-mail only if:
- Your interest strongly aligns with the above areas only
- Students interested in the area of “Machine Learning for Computer System Design” must have an excellent Python programming skill with an understanding of C code with a strong background working with old as well as new ML/DL/LLM-based algorithms.
- Students interested in the area of “Computer Architecture for language model, federated learning, graphics as applications” must have a good C/C++ programming skill with a strong background in pointers, knowledge about LLMs, ML, FL, OS, and/or Computer Architecture are good fit.
- Students interested in the area of formal methods for Computer Architecture must have a good C programming skill with a strong knowledge about Automata Theory.
- Exploring Compute-Memory Integration Strategies for Accelerator-Driven High-Performance and Energy-Efficient Systems, Co-PI, Funded by ANRF ARG (Rs. 92.87L), April 2026-March 2029 (PI: Prof. Madhu Mutyam, CSE, IIT Madras)
- Eco-LLM: Energy Efficient Computation and communication for LLMs with CXL based Chip Architecture and Software, Co-PI, Funded by NSF-MEITY (Rs. 5 Cr), Nov 2024-Nov 2027 (PI: Prof. Manoranjan Satpathy, CSE, IIT Bhubaneswar)
- Performance Projection of Computing Systems using AI, PI, Seed Grant, IIT BBS (Rs. 20L), Feb 2025-Feb 2027
- Breaking the Memory Wall of High Performance Computing: Design and Analysis of 3D Stacked Cache, SERB SRG, Feb 2024-May 2026 (Rs. 31.56L)
- Accelerating NLP Applications in Federated Learning Framework for Mobile SOC, Qualcomm, Sep 2023-Aug 2024 (Rs. 10L)
- Modeling, Analysis and Verification of 3D Stacked Caches, Seed Grant, IIT Roorkee, Completed (Rs. 20L)
- Network Programming, Autumn 2021 @ IIT Roorkee
- Advanced Computer Architecture, Spring 2022 and Spring 2023 @ IIT Roorkee
- Computer Architecture and Microprocessors, Autumn 2022 and Autumn 2023, @ IIT Roorkee
- Cloud Computing, Spring 2024 and Spring 2025 @ IIT Bhubaneswar
- Computer Organization and Architecture, Autumn 2024 and Autumn 2025 @ IIT Bhubaneswar
- Programming in C, Spring 2026 @ IIT Bhubaneswar
Yash Singhal, Ph.D. Scholar @ IIT Roorkee (Jointly with Dr. Raksha Sharma) — Working on Workload Analysis and Architectural Optimizations for Federated Learning Applications
Praveen, Ph.D. Scholar @ IIT Bhubaneswar — Working on 3D Memory
Debraj Kundu, MS Scholar @ IIT Bhubaneswar (Jointly with Dr. Manas Kashop) — Working on Graph Algorithms
Rahul Pathak, MS Scholar @ IIT Bhubaneswar (Jointly with Dr. Pragati Shivastava) — Working on DPU Optimizations
Rudhra Pratap Sahu, MS Scholar @ IIT Bhubaneswar — Working on LLMs Optimization
- Juggler: A Dynamic Warp Scheduler for GPGPUs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol-46(5), 2026, Mohammad Nasser, Nitesh Narayana GS, Abhijit Das, Debiprasanna Sahoo
- Formal Modeling and Verification of Security Properties of a Ransomware-Resistant SSD, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol-42(8), 2022 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy, and Madhu Mutyam
- Formal Modeling and Verification of a Victim DRAM Cache, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol-24(2), 2019 Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha Roop
- ReDRAM: A Reconfigurable DRAM Cache for GPGPUs, IEEE Computer Architecture Letter (CAL), vol-17 (2), 2018 Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam
- Formal Modeling and Verification of Controllers for a Family of DRAM Caches, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol-37(11), 2018, Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha Roop
- PEEP: A Tool for PErformance Effect Prediction, HiPC Workshop, 2025, Ramya G, Debiprasanna Sahoo, Ajaya Kumar Dash
- Slumber: Static Power Management for GPGPU Register Files, 25th, International Symposium on Low Power Electronics and Design, ACM, 2020 Devashree Tripathy, H.Z. Sabzi, Debiprasanna Sahoo, Manoranjan Satpathy, Laxmi Narayan Bhuyan
- Fuzzy Fairness Controller for NVMe SSDs, 34th, International Conference on Supercomputing (ICS), IEEE, 2020 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy, Madhu Mutyam
- Post-Model Validation of Victim DRAM Caches, 37th, International Conference on Computer Design (ICCD), IEEE, 2019 Debiprasanna Sahoo, Shivani Tripathy, Manoranjan Satpathy, Madhu Mutyam
- Formal Modeling and Verification of of NAND Flash Memory, 37th, International Conference on Computer Design (ICCD), IEEE, 2019 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy, Srinivas Pinisetty
- Multidimensional Grid Aware Address Prediction for GPGPU, 32nd, International Conference on VLSI Design (VLSID), IEEE, 2019 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy
- CAMO: A Novel Cache Management Organization for GPGPUs, 23rd, Asia and South Pacific Design Automation Conference (ASP-DAC), ACM, 2018 Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, Laxmi Narayan Bhuyan
- Locking Lines in Tag Cache to Improve Access Optimization for DRAM Caches, International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), ESWEEK, IEEE, 2018 Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy
- An Experimental Study on Dynamic Bank Partitioning of DRAM in Chip Multiprocessors, 30th, International Conference on VLSI Design (VLSID), IEEE, 2017 Debiprasanna Sahoo, Manoranjan Satpathy, Madhu Mutyam
- MSimDRAM: Formal Model Driven Development of DRAM Simulator, 29th, International Conference on VLSI Design (VLSID), IEEE, 2016 Debiprasanna Sahoo, Manoranjan Satpathy
| Degree | Discipline | Year | School |
|---|---|---|---|
| B. Tech. | Computer Science and Engineering | 2009 | College of Engineering and Technology Bhubaneswar |
| M. Tech. | Computer Science and Engineering | 2013 | Indian Institute of Technology Madras |
| Ph.D. | Computer Science and Engineering | 2019 | Indian Institute of Technology Bhubaneswar |
- Assistant Professor for 2.5 years @ IIT Roorkee
- MTS Silicon Design Engineer for 2.5 years @ Advanced Micro Devices (AMD)